Title |
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en
A global code scheduling technique using guarded PDG
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Creator |
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Rights |
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Copyright: Institute of Electrical and Electronic Engineers (IEEE)
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Subject |
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NDC
007.6406
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LCSH
Parallel processing (Electronic computers)--Congresses
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LCSH
Computer algorithms--Congresses
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LCSH
Computer architecture--Congresses
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Description |
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Publisher |
Institute of Electrical and Electronic Engineers
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Date |
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Language |
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Resource Type |
journal article |
Identifier |
HDL
http://hdl.handle.net/2065/818
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URI
https://waseda.repo.nii.ac.jp/records/17301
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Relation |
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Journal |
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Algorithms and Architectures for Parallel Processing, 1995. ICAPP 95. IEEE First ICA/sup 3/PP. IEEE First International Conference on
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Volume NumberVolume 2
Page Start661
Page End669
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File |
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Oaidate |
2023-11-13 |