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Title
  • ja 電子工学実験におけるFORTHの利用
  • en FORTH based logic circuits laboratory work
Creator
    • ja 齋藤, 正和 ja-Kana サイトウ, マサカズ en Saito, Masakazu
    • ja 藁科, 崇 ja-Kana ワラシナ, タカシ en Warashina, Takashi
    • ja 高橋, 光生 ja-Kana タカハシ, ミツオ en Takahashi, Mitsuo
    • ja 田中, 清臣 ja-Kana タナカ, キヨオミ en Tanaka, Kiyoomi
Description
  • Abstract The purpose in the laboratory experiments of logic circuits design, is students to study how tocarry out the software design and hardware design according to each function, and evaluate thedesign in consideration of the trade-off problem.Therefore, paying attention to the modularity and hierarchy of logic circuits design, studentsassemble and test logic circuits, and they study design know-how about logic circuits.As FORTH system has an interactive programming environment and its modularity is suitable toreplace hardware function by software function, we adopt FORTH system for logic circuitslaboratory work.In this paper, new experiment environment of logic circuits design using FPGA, and laboratorywork tools by FORTH system are presented.
Publisher 電気通信大学
Date
    Issued2004-01-31
Language
  • jpn
Resource Type departmental bulletin paper
Version Type VoR
Identifier URI https://uec.repo.nii.ac.jp/records/6821
Journal
    • ISSN 0915-0935
      • ja 電気通信大学紀要
      • Volume Number16 Issue Number2 Page Start179 Page End184
File
Oaidate 2024-03-08